Enabling Fully Homomorphic Encryption through Hardware Acceleration

a KU Leuven spin-off

Leuven Hardware Summit for Computing on Encrypted Data (COED)

23-24 May 2024 @ Faculty Club, Leuven, Belgium

We present the Hardware Summit for Computing on Encrypted Data (COED) to be held on 23-24 May 2024, at the esteemed Faculty Club in Leuven, Belgium.

The aim of this event is to facilitate connections among industrial participants who share an interest in secure computation. There are many options to accelerate the complexity of such computation, such as Fully Homomorphic Encryption (FHE)Zero Knowledge Proofs (ZKP), and many target platforms: CPU, GPU, FPGA, ASIC, etc. We also see variations in acceleration of primitives (NTT/FFT, MSM, etc.).

In this event, we will delve into hardware accelerated computing of FHE, ZKP, and the compiler aspects of them. Our ultimate goal is to explore the application space accelerated computing enables.

Join us for insightful discussions, networking opportunities, and a forward-thinking exploration of the intersection between technology and privacy. 

In addition to well chosen speakers and talks, there will be opportunities for participants to take the stage and give an elevator pitch for announcing their technologies. Networking opportunities will be accompanied with a delicious buffet and lunch from the Faculty Club.

Space is limited, and thus we will be reserving places for representatives of companies that can most benefit from attending the day.


Thursday – 23 May

14:00 – 14:20

Welcome Talk

Ingrid Verbauwhede – Belfort – COSIC

14:20 – 15:00

David Archer – Niobium

Fully Homomorphic Encryption (FHE) provably assures confidentiality of sensitive data during computation. Unfortunately, high computational cost and excessive memory bandwidth requirements prevent its adoption today in most settings. We present BASALISC, the first in a family of hardware coprocessors that mitigate those drawbacks and accelerate FHE computations. BASALISC has been described elsewhere in preliminary form. This paper provides an overview of BASALISC now that its design, validation, and tape-out are complete and manufacturing is underway. BASALISC is the first FHE hardware solution to implement both the BGV and CKKS FHE schemes with fully-packed bootstrapping in ASIC form. BASALISC is a RISC architecture with a small instruction set and a single data type. BASALISC taped out as a 1 GHz ASIC on a 12nm Global Foundries semiconductor process with a die size of 13.4mm x 20mm. Simulation results show a speedup over software-based homomorphic encryption of several thousand times for linear regression and neural network inference applications.

15:00 – 15:40

The Hitchhiker Guide to EC Adder Hardware Acceleration

Yuval Domb – Ingonyama

15:40 – 16:00

Coffee Break

16:00 – 16:40

Michiel Van Beirendonck – Belfort / COSIC

We will present our newest Belfort accelerator, ready to accelerate TFHE applications for any parameter set. We will shed a light on the current state of acceleration, and on the advances to come.

16:40 – 17:00

Elevator Pitch Session

17:00 – 20:00

Reception + Walking dinner with demo’s & posters

Friday – 24 May

8:30 – 9:00

Welcome Coffee

9:00 – 9:40

Nick New – Optalysys

Optalysys are developing their unique photonic approach to accelerate the base functions which dominate the processing of data encrypted under FHE. In this talk Dr New will present the roadmap of their Explore platform, which allows users to access the hardware via the main libraries on the cloud.

9:40 – 10:20

Rosario Cammarota – Intel

Intel HERACLES introduces a groundbreaking near-memory computer architecture optimized for Fully Homomorphic Encryption (FHE) programs, leveraging native processing of ring polynomials. Its dedicated software stack, designed to harness FHE programs’ unique characteristics, efficiently schedules tasks on HERACLES, utilizing advanced FHE algorithms and hardware-assisted features to minimize metadata and evaluation key data movement. This approach significantly enhances performance, achieving up to four orders of magnitude speedup compared to contemporary data center CPUs. HERACLES’ compact form factor, akin to standard data center accelerators, enables a paradigm shift in FHE application performance, moving from batch to close to real-time processing, opening new avenues for efficient encrypted data processing across various industries.

10:20 – 11:00

Coffee Break

11:00 – 11:40

Programming Performant ZK Proofs — Accelerating ZK through AI Compute Paradigms

Thomas De Cnudde – Fabric Cryptography

11:40 – 12:20

Yoshihiro Ohba – Kioxia

We design and implement an NVMe-based secure computing platform with an FPGA-based Torus FHE (TFHE) accelerator, SSD, and a host-sided middleware. We provide a full-fledged secure computing platform for TFHE using an FPGA-based accelerator. We define a set of secure computing instructions to evaluate any 14-bit to 14-bit function using TFHE. Our secure computing platform outperforms a software-based platform with a single high-end CPU by 15 times in gate bootstrapping execution time and by 12 times in electric energy consumption during the gate bootstrapping execution time.

12:30 – 14:00


14:10 – 14:50

Building & Standardizing an Ecosystem for Encrypted Computation with MLIR

Alexander Viand – Intel

14:50 – 15:30

HEIR: A unified compiler for FHE with extensible backends

Shruthi Gorantala & Asra Ali – Google

15:30 – 16:00


16:00 – 16:40

Jason Delabays – Zama

In this presentation, we will explore applications of Fully Homomorphic Encryption (FHE) within blockchain technology, focusing on asset tokenization which requires enhanced confidentiality. We will provide a clear overview of the architecture of fhEVM, our Ethereum Virtual Machine enhanced with FHE capabilities, which allows for encrypted state computations and secure, private transactions. Additionally, we will cover the fundamental principles of FHE, highlighting its unique suitability for complex operations in financial and blockchain environments. This session aims to shed light on how fhEVM can revolutionize blockchain use cases by ensuring privacy without compromising on functionality.

16:40 – 17:20

Final Pitch + Discussions + Future work




Faculty Club in Leuven (a Unesco World Heritage)

The event will take place at Van Hamaele within Convent van Chièvres.

Adress: Groot Begijnhof 14, 3000 Leuven

If you are using GPS to drive there; Faculty club advises using the following address: Tervuursevest 70, 3000 Leuven


You can use parking 2 and parking 3 with the code 7276#

Travel to Leuven

We note that from Brussel Airport Zaventem (BRU — not to be confused with Brussels Charleroi) there is convenient train access between the airport and the city of Leuven itself. Most places in Leuven can be accessed from a walking distance from the train station, however buses and taxis are available at the station. We recommend buying train tickets via the SNCB app or on the website of SNCB.

Important remark: As the English and French translation of the city name is Louvain, you should be careful not to confuse Leuven with Louvain-La-Neuve where the university UCL is situated.